Index of /code/verilog
      Name                    Last modified      Size  Description
      Parent Directory                             -   
      verilog.log             2006-03-31 16:25  3.0K  
      seqlckt_tb.v            2006-03-31 16:25  949   
      seqlckt.v               2006-03-31 16:25  597   
      sep_tb.v                2006-03-31 16:25  603   
      sep_dpu_tb.v            2006-03-31 16:25  2.0K  
      sep_dpu.v               2006-03-31 16:25  1.1K  
      sep_alu_tb.v            2006-03-31 16:25  3.7K  
      sep_alu.v               2006-03-31 16:25  2.5K  
      sep.v                   2006-03-31 16:25   29K  
      sep-addition.txt        2006-03-31 16:25  923   
      rs_ff_tb.v              2006-03-31 16:25  1.4K  
      rs_ff_netlist.v         2006-03-31 16:25  767   
      rs_ff.v                 2006-03-31 16:25  603   
      root_count.v            2006-03-31 16:25  814   
      reg_8bit.v              2006-03-31 16:25  455   
      reg_4bit.v              2006-03-31 16:25  455   
      reg_32bit.v             2006-03-31 16:25  7.6K  
      reg_16bit_tb.v          2006-03-31 16:25  1.0K  
      reg_16bit_netlist.v     2006-03-31 16:25  3.9K  
      reg_16bit.v             2006-03-31 16:25  838   
      reg_12bit_sp.v          2006-03-31 16:25  526   
      reg_12bit_pc.v          2006-03-31 16:25  461   
      reg_12bit.v             2006-03-31 16:25  519   
      program6.data           2006-03-31 16:25   83   
      program5.data           2006-03-31 16:25  393   
      program4.data           2006-03-31 16:25  159   
      program3.data           2006-03-31 16:25  158   
      program2.data           2006-03-31 16:25  202   
      program1.data           2006-03-31 16:25  173   
      mux_8to1_16bit_tb.v     2006-03-31 16:25  1.8K  
      mux_8to1_16bit_netli..> 2006-03-31 16:25  8.9K  
      mux_8to1_16bit.v        2006-03-31 16:25  1.3K  
      mux_4to1.v              2006-03-31 16:25  583   
      mux_2to1_16bit.v        2006-03-31 16:25  863   
      memory_unit.v           2006-03-31 16:25  757   
      maj_tb.v                2006-03-31 16:25  701   
      maj_netlist.v           2006-03-31 16:25  513   
      maj.v                   2006-03-31 16:25  266   
      includes                2006-03-31 16:25  228   
      data_unit_tb.v          2006-03-31 16:25  2.7K  
      data_unit_netlist.v     2006-03-31 16:25  3.6K  
      data_unit.v             2006-03-31 16:25  3.2K  
      counter_4bit_tb.v       2006-03-31 16:25  1.9K  
      counter_4bit_netlist.v  2006-03-31 16:25  2.5K  
      counter_4bit.v          2006-03-31 16:25  1.0K  
      control_unit_tb.v       2006-03-31 16:25  1.7K  
      control_unit.v          2006-03-31 16:25  6.0K  
      alu_slice_tb.v          2006-03-31 16:25  1.1K  
      alu_slice.v             2006-03-31 16:25  637   
      all-verilog.rar         2006-03-31 16:25   29K  
      adder_32bit.v           2006-03-31 16:25  2.8K  
      adder_1bit.v            2006-03-31 16:25  303   
      adder_16bit.v           2006-03-31 16:25  1.4K  
      a4to16_decoder.v        2006-03-31 16:25  1.0K  
      a3to8_decoder.v         2006-03-31 16:25  518   
      RAM_4096x16.v           2006-03-31 16:25  774   
      RAM.data                2006-03-31 16:25   83